1. Field of the Invention
The present invention relates to ESD protection devices that protect, for example, semiconductor ICs from static electricity, and in particular to CSP-type ESD protection devices whose functional portions are provided on silicon substrates.
2. Description of the Related Art
Various electronic apparatuses, such as mobile communication terminals, digital cameras, and notebook PCs include semiconductor integrated circuits (IC chips) that form logic circuits, memory circuits, and the like. Such semiconductor integrated circuits, which are constant-voltage driven circuits formed of fine wiring patterns formed on semiconductor substrates, are in general vulnerable to electrostatic discharges such as surges. Hence, electrostatic discharge (ESD) protection devices are used to protect these semiconductor integrated circuits from electrostatic discharges.
As disclosed in Japanese Unexamined Patent Application Publication No. 4-146660, Japanese Unexamined Patent Application
Publication No. 2001-244418, Japanese Unexamined Patent Application Publication No. 2007-013031, and Japanese Unexamined Patent Application Publication No. 2004-158758, ESD protection devices have a configuration in which an ESD protection circuit including a diode is formed in a semiconductor substrate. A protection operation performed by the diode in the ESD protection circuit utilizes a breakdown phenomenon of the diode at the time when a reverse direction voltage is applied, where the breakdown voltage is equal to the operation voltage.
Japanese Unexamined Patent Application Publication No. 2004-158758 discloses an example in which an ESD protection device is formed as a surface mount component. Here, the configuration of the ESD protection device disclosed in Japanese Unexamined Patent Application Publication No. 2004-158758 is described with reference to FIG. 1. FIG. 1 is a cross-sectional view of a semiconductor device that forms the ESD protection device disclosed in Japanese Unexamined Patent Application Publication No. 2004-158758. This semiconductor device includes a silicon substrate (semiconductor substrate) 1. The silicon substrate 1 has an integrated circuit formed thereon in the middle portion of the upper surface and a plurality of connection pads 2 are arranged at the periphery of the upper surface in such a manner as to be connected to the integrated circuit. An insulating film 3 made of silicon oxide is provided on the upper surface of the silicon substrate 1 except for the center portions of the connection pads 2, and the center portions of the connection pads 2 are exposed via openings 4 provided in the insulating film 3.
A protection film (insulating film) 5 made of an organic resin, such as polyimide, is provided on the upper surface of the insulating film 3. Openings 6 are provided in portions of the protection film 5 corresponding to the openings 4 of the insulating film 3. Depressions 7 are provided in rewiring formation regions of the upper surface of the protection film 5. The depressions 7 communicate with the openings 6.
Rewiring lines 8 each formed of an underlying metal layer 8a and an upper layer metal layer 8b provided on the underlying layer 8a are provided in such a manner as to extend from the upper surfaces of the connection pads 2 exposed through the openings 4 and 6 to predetermined portions of the upper surface of the protection film 5 within the depressions 7.
Column electrodes 10 are provided on the upper surfaces of the pad portions of the rewiring lines 8. A sealing film 11 is provided on the upper surface of the protection film 5 including the rewiring lines 8 such that the upper surface of the sealing film 11 and the upper surfaces of the column electrodes form the same plane. The upper surfaces of the column electrodes 10 have solder balls 12 provided thereon.
There is a problem in that when such an ESD protection device is provided in a high-frequency circuit, an influence from the parasitic capacitance of the diode exists. In other words, as a result of an ESD protection device being inserted in a signal line, the impedance is changed due to an influence from the parasitic capacitance of the diode, and this may cause signal loss. Particularly in an ESD protection device used in a high-frequency circuit, the parasitic capacitance needs to be small to prevent the deterioration of the high-frequency characteristics of signal lines connected to the device and an integrated circuit to be protected.
However, an existing ESD protection device such as the one illustrated in FIG. 1 may structurally cause parasitic capacitance to be generated between the electrodes, in addition to the parasitic capacitance of the diode, and this may result in an increase in the capacitance of the ESD protection device itself.